The present invention relates to the field of computer systems. Computer systems require the use of breakpoints to perform various debug and diagnostic functions. A breakpoint is bit pattern that is a particular state to be recognized in a computer system. A breakpoint signal is presented thereby signaling various processing units that the state presently exists. The breakpoint logic circuit is a valuable tool when trying to determine if a particular condition exists at a particular point when an operator desires to examine other components at that point so as to aid the debug and diagnostic functions.
Typical computer systems or peripheral debug diagnostic systems, for example, logic analyzers, implement breakpoints by using individual registers. A register is a memory element storing a plurality of bits. Each bit in the register can be a logical zero or a logical one, as is common in digital computer systems. The breakpoint is defined by a bit pattern of logical zeros and logical ones, called a breakpoint code, which is stored in the register. The outputs of the register are typically connected to a comparator which compares the present state of the register, that is, the set breakpoint, and the actual conditions existing on address lines or various other control lines. When the contents of the breakpoint registers equal the signals of the address or control lines, the comparator presents a signal which represents that the register and the address and control lines are equal, that is, the breakpoint has been recognized. The signal typically interrupts a computer system or enables a peripheral diagnostic system. This breakpoint can enable the halting or termination of the processing performed by a computer system. Alternatively, it may stop or start a peripheral diagnostic system capable of capturing some portion of the internal state of the computer system.
This termination on capture allows a computer operator to then scrutinize various contents of the computer system to determine if the computer system is in a proper state at the time of recognition, that is, at the breakpoint.
Thus, typical implementations of breakpoint logic circuitry have been via the use of registers and comparators. One of the disadvantages of this implementation is that there is only one breakpoint address that can be loaded into one of the registers at any one time. Thus, for each breakpoint desired, there needs to be an individual breakpoint register, its corresponding comparator and their corresponding interconnection lines. Thus, to implement a capability of a plurality of breakpoints requires a plurality of breakpoint registers, comparators and interconnecting lines. It should now become apparent that as the number of breakpoints desired increases, so does the complexity of the hardware. This disadvantageously increases the cost of the breakpoint hardware.
It is also an object of the present invention to reduce the hardware cost of a single breakpoint.
It is therefore an object of the present invention to provide an increase in the number of possible breakpoints without the corresponding increase in hardware cost and complexity.